On Thu, 07 Apr 2022 03:30:40 -0400, time-nuts-request@lists.febo.com
wrote:
time-nuts Digest, Vol 216, Issue 11
Message: 11
Date: Thu, 07 Apr 2022 04:04:37 +0200
From: ghf@hoffmann-hochfrequenz.de
Subject: [time-nuts] Re: +1/f of transistors
To: Discussion of precise time and frequency measurement
time-nuts@lists.febo.com
Cc: Joseph Gwinn joegwinn@comcast.net
Message-ID:
d95bf46305ac13922e952df5977c9420@hoffmann-hochfrequenz.de
Content-Type: multipart/mixed;
boundary="=_d7d66c5dc46758f967fd363190701e4d"
Am 2022-04-07 1:37, schrieb Joseph Gwinn:
Lately, I've been seeing papers using various microwave pHEMTs but, by
the time you find and read the paper, the part is no longer available.
And, of course, just like low noise MMICs (PGA-103, GALI-74) you have
to
measure them yourself to find out - because the mfr only measures from
50 MHz and up.
It's a big problem. Nor do they specify DC parameters all that well.
A good example is the 2018 paper by Chen, et al. which references the
ATF54143 - a 3 year old paper, and the part isn't available any more.
The 2SK117 shows up a lot in some older articles and app notes (e.g.
from Wenzel) - it's discontinued, but potentially available from some
surplus/obsolete dealers.
There is a list in The Art of Electronics, but some of them won't be
available. Some datasheets do have the curve - the JFE150 from TI
has
its voltage noise curve right on the front page.
What those folk are currently using for capacitance multipliers and
the like (where low 1/f noise is also essential) are SiGe transistors
like the following: BFP640H (Infineon), BFP780, SAV541
(MiniCircuits), and 2S2114K (NPN, beta 1200) for high current
and 2SD2704 from ROHM, even more beta
Interesting. I would not have thought of this one. It's big and
slow, and made from modern very clean silicon, so it could have low
1/f noise. Its transition frequency (*= gain-BW product?) is 35 MHz,
so it ought to work on switcher noise.
Those SiGe transistors have wonderful low Rbb of just a few Ohms,
which results in nice low voltage noise, but some have 1/f corners
of 50 MHz or more; that kills my application completely.
While these chips are small, they are made from very clean material,
so one wonders why so high. The circuit should be physically designed
as if it were to be handling GHz signals, because it could be
oscillating far above the capability of available instruments to
detect.
High input path resistance in the GHz won't affect or cause 1/f noise
near DC.
I would try a lossy ferrite bead on the input.
My application was a base band low noise amplifier and I wanted
a C-multiplier to suppress the noise on Vcc that is fed into
the input Cascode. That noise comes from a LT3042 regulator:
2nV/rtHz in the flat part, but it rises worse than 1/f until
you get the full broadside of Rset = 13K7 here. Increasing the capacitor
over Rset to 47uF or even 100 uF tantalum removed that for
my requirements. The amplifier stays below 1nV/rtHz until
at least <5 Hz.
Regulators are pretty complicated, with many active devices, many in
loops, and so are always noisier than a one-transistor capacitance
multiplier with film capacitor.
The amplifier has 16 CPH3910 FETs in parallel (On Semi), the purple
line is the noise of a 60 Ohm resistor or 1 nV/rtHz. The horizontal
part of the purple line should be at -180 dBV, gain was not yet tuned
when the picture was made.
The line with the input shorted is 10 dB lower, so the amplifier's
own voltage noise is abt. 320 pV/rtHz. I don't think that JFETs
can do much better, including the overpriced JFE150.
Having large organic electrolytics across Vcc (Panasonic SEPF 1000u/16)
seems to worsen things at low frequencies. (orange trace)
I had that result also with other amplifiers. I think that from time
to time, a bunch of electrons defects through the capacitor, creating
some popcorn/telegraph noise.
Try film capacitors. The LIGO crowd did a study of 1/f noise of
capacitors, and found the best.
With a capacitance multiplier, one can use only film capacitors.
True.
Seeing the effect of a 60 Ohm resistor at the input of a low noise
amplifier also makes it clear why 17 dBm+ mixers give bad results
when used as phase detectors. The mixer literature shows that most
17 dBm+ mixers have a resistor in series to each diode to produce
back bias for the other branch, only bypassed for RF.
Probably an array of low level mixers with power dividers and the
outputs summed up fares better as low noise phase detector.
The NIST 2N2222 ring mixer does not have these resistors, contrarily
the transistors are used as switches and not as real diodes, which
keeps their impedance low. Ok, the diode noise is only half-thermal.
But the resistor noise is not.
I think I'll have to set up a series of 1/f noise measurements for AF
and RF parts. The pre-amp puts me in a position to see it in the base
band directly.
This is likely necessary.
applications. And the best choices do keep going obsolete. These
have GHz gain-bandwidth products, and want to oscillate, so some base
or gate resistance (often a ferrite bead) is necessary.
Like AMOBEADS. Or the usual suspects, Murata, Laird, and Wurth.
There would be two applications in a low-noise oscillator. One would
be as a capacitance multiplier to filter the Vcc provided to the
oscillator circuit, giving considerable PSRR. The other would be in
the oscillator circuit itself.
+1
Thanks.
Joe Gwinn
On 07.04.22 22:58, Joseph Gwinn wrote:
There is a list in The Art of Electronics, but some of them won't be
available. Some datasheets do have the curve - the JFE150 from TI
has
its voltage noise curve right on the front page.
What those folk are currently using for capacitance multipliers and
the like (where low 1/f noise is also essential) are SiGe transistors
like the following: BFP640H (Infineon), BFP780, SAV541
(MiniCircuits), and 2S2114K (NPN, beta 1200) for high current
and 2SD2704 from ROHM, even more beta
Interesting. I would not have thought of this one. It's big and
slow, and made from modern very clean silicon, so it could have low
1/f noise. Its transition frequency (*= gain-BW product?) is 35 MHz,
so it ought to work on switcher noise.
Those SiGe transistors have wonderful low Rbb of just a few Ohms,
which results in nice low voltage noise, but some have 1/f corners
of 50 MHz or more; that kills my application completely.
While these chips are small, they are made from very clean material,
so one wonders why so high. The circuit should be physically designed
as if it were to be handling GHz signals, because it could be
oscillating far above the capability of available instruments to
detect.
IF the base and emitter doping would be done through ion implantation,
this can create a lot of defects, which act as recombination centres.
In-situ doping during epitaxial growth of the SiGe base is more
difficult to get right (especially achieving the doping profile
necessary for proper operation of the transistor) than ion implantation,
but can give significantly better noise performance.
For JFETs, the same problems crop up.
But even when the manufacturer in general masters the process, it's not
given that a transfer of products to another plant of the same company
can replicate the results. This is very much dependent not only on
equipment and materials, but also on experience and knowledge of the
engineers actually running the process. Swap just a single one, and the
results may be different by several orders of magnitude. There are quite
a few anecdotes in the industry. That's also a reason space guys often
require sourcing parts manufactured in one named fabrication plant.
Bests,
Florian
I am seeing a lot of unsupported "theories" about what should be done to
make devices with low 1/f noise. It might be instructive for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skiis.
Rick N6RK
On 4/9/22 6:31 AM, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
https://dspace.mit.edu/handle/1721.1/16024 is his MIT thesis.. Is that
what you're thinking of.
On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done to
make devices with low 1/f noise. It might be instructive for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch a
copy.
Recently I was discussing some measurement results with my colleagues as
we're trying to come up with a low noise JFET which can successfully be
integrated into a SiGe BiCMOS process, and quite often we're also
struggling to identify why exactly variant A has significantly lower
noise than variant B, or why a new approach does not improve noise the
way it was expected.
So from a manufacturing process design point of view, achieving low 1/f
noise indeed is closer to sheer dumb luck than the proverbial "more art
than science" suggest.
Florian, DH7FET
On 4/9/22 10:03 AM, usenet@teply.info wrote:
On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for
everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch
a copy.
Recently I was discussing some measurement results with my colleagues
as we're trying to come up with a low noise JFET which can
successfully be integrated into a SiGe BiCMOS process, and quite often
we're also struggling to identify why exactly variant A has
significantly lower noise than variant B, or why a new approach does
not improve noise the way it was expected.
So from a manufacturing process design point of view, achieving low
1/f noise indeed is closer to sheer dumb luck than the proverbial
"more art than science" suggest.
This is very, very true. Some manufacturers get very low noise or very
low leakage (or both), essentially by being "lucky". From what I've
been told, there's no good models, nor predictions - so people share
"lore" of "if you get these 2Nxxxx FETs from the mfr in England, they're
really good" until they aren't. There isn't enough market for these,
so I suspect research money to "solve the problem" isn't available.
Like all those microwave MMICs with low noise, they worry about 100 MHz
and up (if not 1GHz), they certainly don't worry (or control) for noise
at 5 MHz, or where the 1/f knee is. So just because you got good results
with a batch of them, the next batch might not. It's not even clear you
could come up with a standardized test method, because the noise depends
on a lot of other factors (drain current, for instance).
Noise in Physical Systems
Including 1,f Noise, Biological Systems and Membranes : 10th
International Conference, August 21-25, 1989, Budapest, Hungary
1990
https://www.google.com/books/edition/Noise_in_Physical_Systems/WyVbzgEACAAJ?hl=en
On 4/9/2022 11:35 AM, Lux, Jim wrote:
On 4/9/22 10:03 AM, usenet@teply.info wrote:
On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be
done to make devices with low 1/f noise. It might be instructive
for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f
noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch
a copy.
Recently I was discussing some measurement results with my colleagues
as we're trying to come up with a low noise JFET which can
successfully be integrated into a SiGe BiCMOS process, and quite
often we're also struggling to identify why exactly variant A has
significantly lower noise than variant B, or why a new approach does
not improve noise the way it was expected.
So from a manufacturing process design point of view, achieving low
1/f noise indeed is closer to sheer dumb luck than the proverbial
"more art than science" suggest.
This is very, very true. Some manufacturers get very low noise or very
low leakage (or both), essentially by being "lucky". From what I've
been told, there's no good models, nor predictions - so people share
"lore" of "if you get these 2Nxxxx FETs from the mfr in England,
they're really good" until they aren't. There isn't enough market
for these, so I suspect research money to "solve the problem" isn't
available.
Like all those microwave MMICs with low noise, they worry about 100
MHz and up (if not 1GHz), they certainly don't worry (or control) for
noise at 5 MHz, or where the 1/f knee is. So just because you got good
results with a batch of them, the next batch might not. It's not even
clear you could come up with a standardized test method, because the
noise depends on a lot of other factors (drain current, for instance).
time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe
send an email to time-nuts-leave@lists.febo.com
To unsubscribe, go to and follow the instructions there.
A very interesting dissertation. Pdf available.
On 2022-04-09 10:29, Lux, Jim wrote:
On 4/9/22 6:31 AM, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for
everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f
noise.
https://dspace.mit.edu/handle/1721.1/16024 is his MIT thesis.. Is that
what you're thinking of.
time-nuts mailing list -- time-nuts@lists.febo.com -- To unsubscribe
send an email to time-nuts-leave@lists.febo.com
To unsubscribe, go to and follow the instructions there.
Dr. Don Latham AJ7LL
PO Box 404, Frenchtown, MT, 59834
VOX: 406-626-4304
Am 2022-04-09 20:35, schrieb Lux, Jim:
On 4/9/22 10:03 AM, usenet@teply.info wrote:
On 09.04.22 15:31, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for
everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f
noise.
He looks at all kinds of theories and shows that there is no valid
cookbook for how to make low 1/f noise devices. It's the classic
non reproducible process. I remember an FCS
talk many years ago that NIST guru Fred Walls gave with some theory
on how to get low 1/f noise. Unlike his other papers which were
well received (and rightly so), this one was rapidly debunked.
I felt bad for Fred, getting out too far over his skills.
Thanks for the hint towards the thesis, I'll ask our library to fetch
a copy.
Recently I was discussing some measurement results with my colleagues
as we're trying to come up with a low noise JFET which can
successfully be integrated into a SiGe BiCMOS process, and quite often
we're also struggling to identify why exactly variant A has
significantly lower noise than variant B, or why a new approach does
not improve noise the way it was expected.
So from a manufacturing process design point of view, achieving low
1/f noise indeed is closer to sheer dumb luck than the proverbial
"more art than science" suggest.
This is very, very true. Some manufacturers get very low noise or very
low leakage (or both), essentially by being "lucky". From what I've
been told, there's no good models, nor predictions - so people share
"lore" of "if you get these 2Nxxxx FETs from the mfr in England,
they're really good" until they aren't. There isn't enough market
for these, so I suspect research money to "solve the problem" isn't
available.
Buy a life time supply while they are available. One reel will probably
do.
Like all those microwave MMICs with low noise, they worry about 100
MHz and up (if not 1GHz), they certainly don't worry (or control) for
noise at 5 MHz, or where the 1/f knee is. So just because you got good
results with a batch of them, the next batch might not. It's not even
clear you could come up with a standardized test method, because the
noise depends on a lot of other factors (drain current, for instance).
When it changes from lot to lot, then you have lost. You cannot catch
that on the wafer tester. No one can pay for the tester time.
A simple BJT or FET circuit is allotted a ms or so in total, maybe.
You cannot measure 1/f in the 100 Hz range in that time. The picture
of the FET amplifier I had 3 days ago took 35 minutes, per trace.
By far, most of the wall time is aquisition time for the lowest octaves.
Setting the drain current is cheap, it takes maybe a dozen of test
vectors.
But tester time is paid in millions of vectors per second.
Gerhard
On Samstag, 9. April 2022 18:29:11 CEST Lux, Jim wrote:
On 4/9/22 6:31 AM, Richard (Rick) Karlquist wrote:
I am seeing a lot of unsupported "theories" about what should be done
to make devices with low 1/f noise. It might be instructive for everyone
to read Marv Keshner's PhD dissertation (Stanford) discussing 1/f noise.
https://dspace.mit.edu/handle/1721.1/16024 is his MIT thesis.. Is that
what you're thinking of.
A condensed summary of that thesis is available in the March 1982 Proceedings
of the IEEE (Vol.70, No. 3).
+<[Q+ Matrix-12 WAVE#46+305 Neuron microQkb Andromeda XTk Blofeld]>+
Waldorf MIDI Implementation & additional documentation:
http://Synth.Stromeko.net/Downloads.html#WaldorfDocs