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Re: [time-nuts] Next upgrade

E
EWKehren@aol.com
Thu, Nov 23, 2017 6:18 PM

The Next upgrade has touched several subjects we deal with on a dayle
basis. Allow mw to add my thoughts. First we are time nuts trying within our
limits to advance time and frequency generation and measurement with
affordable  resources. We are at least a factor four orders of magnitude behind  the
big boys in performance and  combined available resources.
As a market we are to small potato's so products tailored to our needs are
limited and are getting less. An example SRS FS740 a nice box but no help
to get  past E-12. New GPSDO's for Telecom do not have 5 or 10 MHz output.
PRS-10 a nice Rb, originally intended for FRS replacement has ADC and DCA
control limeting it to 2 E-12. I have one, have not said anything because I
want to get rid of it.
The question of why Rb. For our work there are only two reasons. Not living
next to NIST the only precise frequency reference is GPS. To overcome its
limits  you need long time averaging. Aging compared to a OCXO is orders of
magnitude  less. Second because of aging and tuning range a 16 bit DAC will
do the job.  There was recently discussion of the use of the LTC1655 which
is still my # 1  choice. What was not mentioned on the 1650 is that in needs
a external reference  discontinued and double ling the cost. 18 bits would
be nicer but we have not  found one affordable. Using a modified Shera with 1
E-14 steps yields a  range up to 6.4 E-10. We are presently running three
Tbolts, standard, OSA 8600  and the Efratom M100 with 40 000 seconds and 6
E-17 per uV direct C field drive  through a 10 K resistor. Temperature,
pressure and some start up issues make it  a less desirable option.For temperature
and pressure we have an interface board,  but automatic recovery after
power or GPS loss is not there after two weeks.  That is why we keep going back
to 1655/Shera. Going to 6 E-17 keeps the jumps we  all see below ! E-13.
Attila recently caught up with me on my Europe trip at  Juerg's home in
Switzerland and can tell you about all our projects. Using the  standard Tbolt we
also showed him the consistent jumps with a Tracor 527E and a  Cesium
reference.
Yes doing a Cesium GPSDO again with 1655/Shera is doable but the question
has to be: is it necessary. I worked with Richard McCorkle on it 4 years
ago.  The question is does it make sense. My HP5061B with the new smaller tube
shows  no aging but my GPS measuring capabilities are limited to 1 E-12. We
have  decided to monitor 1 pps from a Tbolt against a 1pps derived from our
respective  Cs and if necessary manually adjust.. To do it with le least
amount of equipment  we decided to take a PICTIC II a divider chain and a
custom V drive  using USB stick and blue tooth monitoring low cost, no fan and
low power. I  never built a PICTIC but did combine Richard's and my boards for
cost reason.  Bill Riley did an extensive evaluation and recommended to
consider 4 layers.  This was the first time I looked at the board. Richard used
schematic  capture resulting in no ground plane and long ground runs not
what you want when  you chase nsec. I took a look and decided 4 layers is not
necessary but was able  to add a nice ground plane. I have boards of PICTIC,
divider and V drive. Right  now we still have work to do on M100/FRK GPSDO
and the high resolution Austron  counter. If some one wants to build a unit,
please contact me off list, if I am  convinced you will do it, I will send
you the boards free of charge.
Richard did a PICTIC III and was working on a 4 and I was working on a 5.
Sadly contact with him has stopped, the last correspondence was two years
ago,  he had fallen and broken some ribs and had prostate cancer. His last
words  where, he would get back with me after health was back under control. I
have  tried what I did with Brooks, send a letter with USPS which resulted
in Brooks Wife responding, you know the details, no response from Fairbanks.
Has  any one heard from Richard?  He did a lot of work for us, brilliant, I
would ask a question, because of the time zone the typical next day
response was  working PIC code.
Bert Kehren

In a message dated 11/22/2017 7:26:57 P.M. Eastern Standard Time,
k8yumdoober@gmail.com writes:

For the  most part the SRS-10 is a nice choice, although I'd always be wary
of  buying a
used one.

My only real beefs are that the tuning  granularity is rather coarse, about
2E-12, and the
disciplining loop  seems to be a bit aggressive so that the poor oscillator
gets  jerked
around quite a bit by the GPS.  This makes for rather  ugly-looking plots of
time error
over time.

The above comments  are derived from about 3 years of operating one as a hot
emergency spare at  the Arecibo Observatory against the day when the H-maser
crashed  abruptly.  In this case the SRS-10 was embedded in an FS725 which
we
bought new.

Dana

On Wed, Nov 22, 2017 at 4:16 PM,  Jerry Hancock jerry@hanler.com wrote:

Three  questions:

  1. Now that I’ve split my Lucent RFTG-U into a REF0  and REF1 unit with
    both supplying 10Mhz and 1PPS, is there a way to  combine the outputs or
    some other technique to improve the short  and/or long term performance?

  2. I’ve become interested in  Rubidium Disciplined Oscillators recently

and

was now thinking of  purchasing one of the PRS-10 that I see on Ebay. If I
did that and  replaced one of the DOCXOs from one of the Lucent boxes,

what

impact  would this have on the overall performance both with and without
(when  in hold-over)?  Basically, is it worth the money to upgrade one  of
the boxes to a Rubidium disciplined oscillator assuming the GPS  signal is
rarely lost?

  1. Figuring the PRS-10 will  cost around $250 when all is said and done,

is

there a better option  to improve my GPSDO system?

I basically use the GPSDO as a  reference for any equipment that takes an
input. I have no monetary  need for a reference, just an interest.

Thanks.

Jerry


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The Next upgrade has touched several subjects we deal with on a dayle basis. Allow mw to add my thoughts. First we are time nuts trying within our limits to advance time and frequency generation and measurement with affordable resources. We are at least a factor four orders of magnitude behind the big boys in performance and combined available resources. As a market we are to small potato's so products tailored to our needs are limited and are getting less. An example SRS FS740 a nice box but no help to get past E-12. New GPSDO's for Telecom do not have 5 or 10 MHz output. PRS-10 a nice Rb, originally intended for FRS replacement has ADC and DCA control limeting it to 2 E-12. I have one, have not said anything because I want to get rid of it. The question of why Rb. For our work there are only two reasons. Not living next to NIST the only precise frequency reference is GPS. To overcome its limits you need long time averaging. Aging compared to a OCXO is orders of magnitude less. Second because of aging and tuning range a 16 bit DAC will do the job. There was recently discussion of the use of the LTC1655 which is still my # 1 choice. What was not mentioned on the 1650 is that in needs a external reference discontinued and double ling the cost. 18 bits would be nicer but we have not found one affordable. Using a modified Shera with 1 E-14 steps yields a range up to 6.4 E-10. We are presently running three Tbolts, standard, OSA 8600 and the Efratom M100 with 40 000 seconds and 6 E-17 per uV direct C field drive through a 10 K resistor. Temperature, pressure and some start up issues make it a less desirable option.For temperature and pressure we have an interface board, but automatic recovery after power or GPS loss is not there after two weeks. That is why we keep going back to 1655/Shera. Going to 6 E-17 keeps the jumps we all see below ! E-13. Attila recently caught up with me on my Europe trip at Juerg's home in Switzerland and can tell you about all our projects. Using the standard Tbolt we also showed him the consistent jumps with a Tracor 527E and a Cesium reference. Yes doing a Cesium GPSDO again with 1655/Shera is doable but the question has to be: is it necessary. I worked with Richard McCorkle on it 4 years ago. The question is does it make sense. My HP5061B with the new smaller tube shows no aging but my GPS measuring capabilities are limited to 1 E-12. We have decided to monitor 1 pps from a Tbolt against a 1pps derived from our respective Cs and if necessary manually adjust.. To do it with le least amount of equipment we decided to take a PICTIC II a divider chain and a custom V drive using USB stick and blue tooth monitoring low cost, no fan and low power. I never built a PICTIC but did combine Richard's and my boards for cost reason. Bill Riley did an extensive evaluation and recommended to consider 4 layers. This was the first time I looked at the board. Richard used schematic capture resulting in no ground plane and long ground runs not what you want when you chase nsec. I took a look and decided 4 layers is not necessary but was able to add a nice ground plane. I have boards of PICTIC, divider and V drive. Right now we still have work to do on M100/FRK GPSDO and the high resolution Austron counter. If some one wants to build a unit, please contact me off list, if I am convinced you will do it, I will send you the boards free of charge. Richard did a PICTIC III and was working on a 4 and I was working on a 5. Sadly contact with him has stopped, the last correspondence was two years ago, he had fallen and broken some ribs and had prostate cancer. His last words where, he would get back with me after health was back under control. I have tried what I did with Brooks, send a letter with USPS which resulted in Brooks Wife responding, you know the details, no response from Fairbanks. Has any one heard from Richard? He did a lot of work for us, brilliant, I would ask a question, because of the time zone the typical next day response was working PIC code. Bert Kehren In a message dated 11/22/2017 7:26:57 P.M. Eastern Standard Time, k8yumdoober@gmail.com writes: For the most part the SRS-10 is a nice choice, although I'd always be wary of buying a used one. My only real beefs are that the tuning granularity is rather coarse, about 2E-12, and the disciplining loop seems to be a bit aggressive so that the poor oscillator gets jerked around quite a bit by the GPS. This makes for rather ugly-looking plots of time error over time. The above comments are derived from about 3 years of operating one as a hot emergency spare at the Arecibo Observatory against the day when the H-maser crashed abruptly. In this case the SRS-10 was embedded in an FS725 which we bought new. Dana On Wed, Nov 22, 2017 at 4:16 PM, Jerry Hancock <jerry@hanler.com> wrote: > Three questions: > > 1) Now that I’ve split my Lucent RFTG-U into a REF0 and REF1 unit with > both supplying 10Mhz and 1PPS, is there a way to combine the outputs or > some other technique to improve the short and/or long term performance? > > 2) I’ve become interested in Rubidium Disciplined Oscillators recently and > was now thinking of purchasing one of the PRS-10 that I see on Ebay. If I > did that and replaced one of the DOCXOs from one of the Lucent boxes, what > impact would this have on the overall performance both with and without > (when in hold-over)? Basically, is it worth the money to upgrade one of > the boxes to a Rubidium disciplined oscillator assuming the GPS signal is > rarely lost? > > 3) Figuring the PRS-10 will cost around $250 when all is said and done, is > there a better option to improve my GPSDO system? > > I basically use the GPSDO as a reference for any equipment that takes an > input. I have no monetary need for a reference, just an interest. > > Thanks. > > Jerry > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/ > mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
AK
Attila Kinali
Sun, Nov 26, 2017 1:26 PM

On Thu, 23 Nov 2017 13:18:35 -0500
Bert Kehren via time-nuts time-nuts@febo.com wrote:

There was recently discussion of the use of the LTC1655 which
is still my # 1  choice. What was not mentioned on the 1650 is that in needs
a external reference  discontinued and double ling the cost.

There is just a tad bit of catch here:
The LTC1655 has an order of magnitude higher noise, a factor 2-3 higher
tempco of an LTC1650+LTC6655, a factor 2 higher DNL and a factor 2 higher INL.
The LTC1650 is the better DAC. That's why it's more expensive.

Whether the increased performance is worth the money or not, depends
on the application.

While we are at it, I'd like to mention the LTC1821. It beats the LTC1650
in most parameters, including price. But it has an increadibly low
spec'ed noise (typ 20nV/sqrt(Hz) at full scale output)

18 bits would be nicer but we have not  found one affordable.

It seems that manufacturing gets too costly for anything beyond 16bit
(unless you cut off at 10Hz).

Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

		Attila Kinali

--
You know, the very powerful and the very stupid have one thing in common.
They don't alters their views to fit the facts, they alter the facts to
fit the views, which can be uncomfortable if you happen to be one of the
facts that needs altering.  -- The Doctor

On Thu, 23 Nov 2017 13:18:35 -0500 Bert Kehren via time-nuts <time-nuts@febo.com> wrote: > There was recently discussion of the use of the LTC1655 which > is still my # 1 choice. What was not mentioned on the 1650 is that in needs > a external reference discontinued and double ling the cost. There is just a tad bit of catch here: The LTC1655 has an order of magnitude higher noise, a factor 2-3 higher tempco of an LTC1650+LTC6655, a factor 2 higher DNL and a factor 2 higher INL. The LTC1650 is the better DAC. That's why it's more expensive. Whether the increased performance is worth the money or not, depends on the application. While we are at it, I'd like to mention the LTC1821. It beats the LTC1650 in most parameters, including price. But it has an increadibly low spec'ed noise (typ 20nV/sqrt(Hz) at full scale output) > 18 bits would be nicer but we have not found one affordable. It seems that manufacturing gets too costly for anything beyond 16bit (unless you cut off at 10Hz). Though, if you have a decent 16bit DAC and want to get to 18bit, that's fairly simple using delta-sigma modulation... if you can live with a low pass fillter after the DAC. But the DNL will be the limiting factor here (unless you use some special techniques) and the (absolute) INL will not get better, for obvious reasons. Attila Kinali -- You know, the very powerful and the very stupid have one thing in common. They don't alters their views to fit the facts, they alter the facts to fit the views, which can be uncomfortable if you happen to be one of the facts that needs altering. -- The Doctor
MD
Magnus Danielson
Sun, Nov 26, 2017 1:50 PM

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:

Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation
scheme. A first degree sigma-delta would also be possible, but for low
ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes
trivial to filter, then the filter will not be hard to design and won't
be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus

Hi On 11/26/2017 02:26 PM, Attila Kinali wrote: > Though, if you have a decent 16bit DAC and want to get to 18bit, > that's fairly simple using delta-sigma modulation... if you can live > with a low pass fillter after the DAC. But the DNL will be the limiting > factor here (unless you use some special techniques) and the (absolute) INL > will not get better, for obvious reasons. I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. A first degree sigma-delta is fairly simple thought. The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. Cheers, Magnus
OP
Ole Petter Rønningen
Sun, Nov 26, 2017 1:56 PM

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


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and follow the instructions there.

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» http://cds.linear.com/docs/en/application-note/an86f.pdf Ole > 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: > > Hi > >> On 11/26/2017 02:26 PM, Attila Kinali wrote: >> Though, if you have a decent 16bit DAC and want to get to 18bit, >> that's fairly simple using delta-sigma modulation... if you can live >> with a low pass fillter after the DAC. But the DNL will be the limiting >> factor here (unless you use some special techniques) and the (absolute) INL >> will not get better, for obvious reasons. > > I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. > > A first degree sigma-delta is fairly simple thought. > > The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. > > Cheers, > Magnus > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
BK
Bob kb8tq
Sun, Nov 26, 2017 4:53 PM

Hi

Each time I’ve tried the method in the app note, there has been a tone in the output
spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding
that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO
when it goes into the EFC port.

Bob

On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen opronningen@gmail.com wrote:

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


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To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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Hi Each time I’ve tried the method in the app note, there has been a tone in the output spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO when it goes into the EFC port. Bob > On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronningen@gmail.com> wrote: > > I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» > > http://cds.linear.com/docs/en/application-note/an86f.pdf > > Ole > >> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: >> >> Hi >> >>> On 11/26/2017 02:26 PM, Attila Kinali wrote: >>> Though, if you have a decent 16bit DAC and want to get to 18bit, >>> that's fairly simple using delta-sigma modulation... if you can live >>> with a low pass fillter after the DAC. But the DNL will be the limiting >>> factor here (unless you use some special techniques) and the (absolute) INL >>> will not get better, for obvious reasons. >> >> I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. >> >> A first degree sigma-delta is fairly simple thought. >> >> The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. >> >> Cheers, >> Magnus >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
AB
Azelio Boriani
Sun, Nov 26, 2017 5:13 PM

Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less)
DAC with an op-amp not good enough?

On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

Each time I’ve tried the method in the app note, there has been a tone in the output
spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding
that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO
when it goes into the EFC port.

Bob

On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen opronningen@gmail.com wrote:

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.


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To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
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and follow the instructions there.

Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less) DAC with an op-amp not good enough? On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq <kb8tq@n1k.org> wrote: > Hi > > Each time I’ve tried the method in the app note, there has been a tone in the output > spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding > that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO > when it goes into the EFC port. > > Bob > >> On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronningen@gmail.com> wrote: >> >> I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» >> >> http://cds.linear.com/docs/en/application-note/an86f.pdf >> >> Ole >> >>> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: >>> >>> Hi >>> >>>> On 11/26/2017 02:26 PM, Attila Kinali wrote: >>>> Though, if you have a decent 16bit DAC and want to get to 18bit, >>>> that's fairly simple using delta-sigma modulation... if you can live >>>> with a low pass fillter after the DAC. But the DNL will be the limiting >>>> factor here (unless you use some special techniques) and the (absolute) INL >>>> will not get better, for obvious reasons. >>> >>> I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. >>> >>> A first degree sigma-delta is fairly simple thought. >>> >>> The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. >>> >>> Cheers, >>> Magnus >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
BK
Bob kb8tq
Sun, Nov 26, 2017 5:25 PM

Hi

If you sum two DAC’s without any sort of feedback, you get problems when the
“coarse” dac is changed. You have no way to know the step size of the coarse
dac to (say) 20 bit precision.

As an example : If you are after 20 “good” bits, you might overlap
them at the 10 bit point on the coarse dac. That would give you 22 bits on the
summed output. It would give you enough extra bits to take care of any odd
things that might be going on. You only have 1/1024 of the total range before
you must tune the coarse dac. Even with a good set of parts, you will be
doing coarse tuning.

Bob

On Nov 26, 2017, at 12:13 PM, Azelio Boriani azelio.boriani@gmail.com wrote:

Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less)
DAC with an op-amp not good enough?

On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

Each time I’ve tried the method in the app note, there has been a tone in the output
spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding
that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO
when it goes into the EFC port.

Bob

On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen opronningen@gmail.com wrote:

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


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Hi If you sum two DAC’s without any sort of feedback, you get problems when the “coarse” dac is changed. You have no way to know the step size of the coarse dac to (say) 20 bit precision. As an example : If you are after 20 “good” bits, you might overlap them at the 10 bit point on the coarse dac. That would give you 22 bits on the summed output. It would give you enough extra bits to take care of any odd things that might be going on. You only have 1/1024 of the total range before you must tune the coarse dac. Even with a good set of parts, you *will* be doing coarse tuning. Bob > On Nov 26, 2017, at 12:13 PM, Azelio Boriani <azelio.boriani@gmail.com> wrote: > > Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less) > DAC with an op-amp not good enough? > > On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq <kb8tq@n1k.org> wrote: >> Hi >> >> Each time I’ve tried the method in the app note, there has been a tone in the output >> spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding >> that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO >> when it goes into the EFC port. >> >> Bob >> >>> On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronningen@gmail.com> wrote: >>> >>> I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» >>> >>> http://cds.linear.com/docs/en/application-note/an86f.pdf >>> >>> Ole >>> >>>> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: >>>> >>>> Hi >>>> >>>>> On 11/26/2017 02:26 PM, Attila Kinali wrote: >>>>> Though, if you have a decent 16bit DAC and want to get to 18bit, >>>>> that's fairly simple using delta-sigma modulation... if you can live >>>>> with a low pass fillter after the DAC. But the DNL will be the limiting >>>>> factor here (unless you use some special techniques) and the (absolute) INL >>>>> will not get better, for obvious reasons. >>>> >>>> I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. >>>> >>>> A first degree sigma-delta is fairly simple thought. >>>> >>>> The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. >>>> >>>> Cheers, >>>> Magnus >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts@febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
AB
Azelio Boriani
Sun, Nov 26, 2017 6:05 PM

...and what about shrinking the 16bit over the fraction of the EFC
range that, for example, the OCXO will be using for the next 5 years?
16bit over 10V are as 20 (a little less, OK) over 1V, if I can use my
16bit over 1V for the next 5 years, when the DAC will be near full
scale I can "trim" the aging.

On Sun, Nov 26, 2017 at 6:25 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

If you sum two DAC’s without any sort of feedback, you get problems when the
“coarse” dac is changed. You have no way to know the step size of the coarse
dac to (say) 20 bit precision.

As an example : If you are after 20 “good” bits, you might overlap
them at the 10 bit point on the coarse dac. That would give you 22 bits on the
summed output. It would give you enough extra bits to take care of any odd
things that might be going on. You only have 1/1024 of the total range before
you must tune the coarse dac. Even with a good set of parts, you will be
doing coarse tuning.

Bob

On Nov 26, 2017, at 12:13 PM, Azelio Boriani azelio.boriani@gmail.com wrote:

Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less)
DAC with an op-amp not good enough?

On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

Each time I’ve tried the method in the app note, there has been a tone in the output
spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding
that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO
when it goes into the EFC port.

Bob

On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen opronningen@gmail.com wrote:

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.


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...and what about shrinking the 16bit over the fraction of the EFC range that, for example, the OCXO will be using for the next 5 years? 16bit over 10V are as 20 (a little less, OK) over 1V, if I can use my 16bit over 1V for the next 5 years, when the DAC will be near full scale I can "trim" the aging. On Sun, Nov 26, 2017 at 6:25 PM, Bob kb8tq <kb8tq@n1k.org> wrote: > Hi > > If you sum two DAC’s without any sort of feedback, you get problems when the > “coarse” dac is changed. You have no way to know the step size of the coarse > dac to (say) 20 bit precision. > > As an example : If you are after 20 “good” bits, you might overlap > them at the 10 bit point on the coarse dac. That would give you 22 bits on the > summed output. It would give you enough extra bits to take care of any odd > things that might be going on. You only have 1/1024 of the total range before > you must tune the coarse dac. Even with a good set of parts, you *will* be > doing coarse tuning. > > Bob > >> On Nov 26, 2017, at 12:13 PM, Azelio Boriani <azelio.boriani@gmail.com> wrote: >> >> Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less) >> DAC with an op-amp not good enough? >> >> On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq <kb8tq@n1k.org> wrote: >>> Hi >>> >>> Each time I’ve tried the method in the app note, there has been a tone in the output >>> spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding >>> that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO >>> when it goes into the EFC port. >>> >>> Bob >>> >>>> On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronningen@gmail.com> wrote: >>>> >>>> I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» >>>> >>>> http://cds.linear.com/docs/en/application-note/an86f.pdf >>>> >>>> Ole >>>> >>>>> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: >>>>> >>>>> Hi >>>>> >>>>>> On 11/26/2017 02:26 PM, Attila Kinali wrote: >>>>>> Though, if you have a decent 16bit DAC and want to get to 18bit, >>>>>> that's fairly simple using delta-sigma modulation... if you can live >>>>>> with a low pass fillter after the DAC. But the DNL will be the limiting >>>>>> factor here (unless you use some special techniques) and the (absolute) INL >>>>>> will not get better, for obvious reasons. >>>>> >>>>> I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. >>>>> >>>>> A first degree sigma-delta is fairly simple thought. >>>>> >>>>> The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. >>>>> >>>>> Cheers, >>>>> Magnus >>>>> _______________________________________________ >>>>> time-nuts mailing list -- time-nuts@febo.com >>>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>> and follow the instructions there. >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts@febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
BK
Bob kb8tq
Sun, Nov 26, 2017 7:39 PM

Hi

If you only run over 10% of the EFC range, you only gain 3 bits. If the objective is
in the 22 bit vicinity, (maybe 20 maybe 22 …) you really don’t get enough bits at a 10%
span. From a lot of years of playing with control loops, if you need 20 good bits, you better
have a few more than that in the design …. Indeed there are converters out there with 1/8
LSB performance. There also are a lot of them with “guaranteed monotonic” as the main spec.
In that case you may get 2 LSB of “jump” as you do this or that….

Indeed another alternative is to let the OCXO warm up for a month. Then adjust a pot to center
things up. Run a “fine range” ADC to keep it happy. Come back in three to nine months and
tweak the pot again. The main risk is a power outage and waiting a few weeks to get things
back up and running again.

A lot of this depends on how much of an EFC range you have and how much aging you expect.
If you have 4 PPM of EFC and expect 1x10^-9 per month that gets you a pretty small range. If
you have 5x10^-8 of EFC and expect 1x10^-9 per day, the entire EFC may not last you for very
long at all.

Another factor is temperature. Your OCXO may be happy at 1x10^-11 / C. If your control circuit
is good at the 5x10^-10 / C level that may be ok or it may be a problem. Either way, your control
range needs to accommodate both the OCXO and the rest of the circuit on top of the aging.

Bob

On Nov 26, 2017, at 1:05 PM, Azelio Boriani azelio.boriani@gmail.com wrote:

...and what about shrinking the 16bit over the fraction of the EFC
range that, for example, the OCXO will be using for the next 5 years?
16bit over 10V are as 20 (a little less, OK) over 1V, if I can use my
16bit over 1V for the next 5 years, when the DAC will be near full
scale I can "trim" the aging.

On Sun, Nov 26, 2017 at 6:25 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

If you sum two DAC’s without any sort of feedback, you get problems when the
“coarse” dac is changed. You have no way to know the step size of the coarse
dac to (say) 20 bit precision.

As an example : If you are after 20 “good” bits, you might overlap
them at the 10 bit point on the coarse dac. That would give you 22 bits on the
summed output. It would give you enough extra bits to take care of any odd
things that might be going on. You only have 1/1024 of the total range before
you must tune the coarse dac. Even with a good set of parts, you will be
doing coarse tuning.

Bob

On Nov 26, 2017, at 12:13 PM, Azelio Boriani azelio.boriani@gmail.com wrote:

Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less)
DAC with an op-amp not good enough?

On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq kb8tq@n1k.org wrote:

Hi

Each time I’ve tried the method in the app note, there has been a tone in the output
spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding
that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO
when it goes into the EFC port.

Bob

On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen opronningen@gmail.com wrote:

I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift»

http://cds.linear.com/docs/en/application-note/an86f.pdf

Ole

  1. nov. 2017 kl. 13:50 skrev Magnus Danielson magnus@rubidium.dyndns.org:

Hi

On 11/26/2017 02:26 PM, Attila Kinali wrote:
Though, if you have a decent 16bit DAC and want to get to 18bit,
that's fairly simple using delta-sigma modulation... if you can live
with a low pass fillter after the DAC. But the DNL will be the limiting
factor here (unless you use some special techniques) and the (absolute) INL
will not get better, for obvious reasons.

I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient.

A first degree sigma-delta is fairly simple thought.

The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles.

Cheers,
Magnus


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Hi If you only run over 10% of the EFC range, you only gain 3 bits. If the objective is in the 22 bit vicinity, (maybe 20 maybe 22 …) you really don’t get enough bits at a 10% span. From a lot of years of playing with control loops, if you need 20 *good* bits, you better have a few more than that in the design …. Indeed there are converters out there with 1/8 LSB performance. There also are a lot of them with “guaranteed monotonic” as the main spec. In that case you may get 2 LSB of “jump” as you do this or that…. Indeed another alternative is to let the OCXO warm up for a month. Then adjust a pot to center things up. Run a “fine range” ADC to keep it happy. Come back in three to nine months and tweak the pot again. The main risk is a power outage and waiting a few weeks to get things back up and running again. A lot of this depends on how much of an EFC range you have and how much aging you expect. If you have 4 PPM of EFC and expect 1x10^-9 per month that gets you a pretty small range. If you have 5x10^-8 of EFC and expect 1x10^-9 per day, the entire EFC may not last you for very long at all. Another factor is temperature. Your OCXO may be happy at 1x10^-11 / C. If your control circuit is good at the 5x10^-10 / C level that may be ok or it may be a problem. Either way, your control range needs to accommodate both the OCXO and the rest of the circuit on top of the aging. Bob > On Nov 26, 2017, at 1:05 PM, Azelio Boriani <azelio.boriani@gmail.com> wrote: > > ...and what about shrinking the 16bit over the fraction of the EFC > range that, for example, the OCXO will be using for the next 5 years? > 16bit over 10V are as 20 (a little less, OK) over 1V, if I can use my > 16bit over 1V for the next 5 years, when the DAC will be near full > scale I can "trim" the aging. > > On Sun, Nov 26, 2017 at 6:25 PM, Bob kb8tq <kb8tq@n1k.org> wrote: >> Hi >> >> If you sum two DAC’s without any sort of feedback, you get problems when the >> “coarse” dac is changed. You have no way to know the step size of the coarse >> dac to (say) 20 bit precision. >> >> As an example : If you are after 20 “good” bits, you might overlap >> them at the 10 bit point on the coarse dac. That would give you 22 bits on the >> summed output. It would give you enough extra bits to take care of any odd >> things that might be going on. You only have 1/1024 of the total range before >> you must tune the coarse dac. Even with a good set of parts, you *will* be >> doing coarse tuning. >> >> Bob >> >>> On Nov 26, 2017, at 12:13 PM, Azelio Boriani <azelio.boriani@gmail.com> wrote: >>> >>> Is summing a "fine tune" 16bit DAC and a "coarse tune" 16bit (or less) >>> DAC with an op-amp not good enough? >>> >>> On Sun, Nov 26, 2017 at 5:53 PM, Bob kb8tq <kb8tq@n1k.org> wrote: >>>> Hi >>>> >>>> Each time I’ve tried the method in the app note, there has been a tone in the output >>>> spectrum at the sample rate of the ADC. I’ve never found a way to do the grounding >>>> that eliminates it. The tone is large enough to show up as a spur on a “typical” OCXO >>>> when it goes into the EFC port. >>>> >>>> Bob >>>> >>>>> On Nov 26, 2017, at 8:56 AM, Ole Petter Rønningen <opronningen@gmail.com> wrote: >>>>> >>>>> I guess everyone has seen this, but Linear has a nice appnote «A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift» >>>>> >>>>> http://cds.linear.com/docs/en/application-note/an86f.pdf >>>>> >>>>> Ole >>>>> >>>>>> 26. nov. 2017 kl. 13:50 skrev Magnus Danielson <magnus@rubidium.dyndns.org>: >>>>>> >>>>>> Hi >>>>>> >>>>>>> On 11/26/2017 02:26 PM, Attila Kinali wrote: >>>>>>> Though, if you have a decent 16bit DAC and want to get to 18bit, >>>>>>> that's fairly simple using delta-sigma modulation... if you can live >>>>>>> with a low pass fillter after the DAC. But the DNL will be the limiting >>>>>>> factor here (unless you use some special techniques) and the (absolute) INL >>>>>>> will not get better, for obvious reasons. >>>>>> >>>>>> I needed 19 bit rather than 16 bit, so I implemented an interpolation scheme. A first degree sigma-delta would also be possible, but for low ratios what I did was more efficient. >>>>>> >>>>>> A first degree sigma-delta is fairly simple thought. >>>>>> >>>>>> The trick is that you want to push the noise high up so it becomes trivial to filter, then the filter will not be hard to design and won't be low enough to cause PLL instability and implementation troubles. >>>>>> >>>>>> Cheers, >>>>>> Magnus >>>>>> _______________________________________________ >>>>>> time-nuts mailing list -- time-nuts@febo.com >>>>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>>> and follow the instructions there. >>>>> _______________________________________________ >>>>> time-nuts mailing list -- time-nuts@febo.com >>>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>> and follow the instructions there. >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts@febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.