Isolated 1PPS-input for distribution-amp?
Hi all,
I'm looking for a solution for galvanic isolation of a 1PPS signal-input to
a distribution amplifier.
We have an old box using HCPL-2411 at the input followed by 74LS04, but the
degraded rise-time (from below 3ns out of a clock, to >12 ns out of the
box) and increased jitter (from below TIC-resolution of 20ps out of the
clock to 700ps std.dev at 100s out of the box) are now limiting our
measurements.
Does anyone have experience with a circuit with good rise-time and low
jitter?
Should I look for better optoisolators, or pulse-transformers, or something
else?
thanks for your input!
Anders
PS. I started on publishing my distribution-amplifier (non isolated) on the
ohwr.org site, see https://www.ohwr.org/projects/pda-8ch-fda-8ch/wiki/wiki
HCPL7101 and similar 50MBaud optocouplers claim 50ps rms jitter.
Some non optical isolated couplers specify ~30ps jitter.
Bruce
On 01 September 2017 at 00:12 Anders Wallin <anders.e.e.wallin@gmail.com> wrote:
Hi all,
I'm looking for a solution for galvanic isolation of a 1PPS signal-input to
a distribution amplifier.
We have an old box using HCPL-2411 at the input followed by 74LS04, but the
degraded rise-time (from below 3ns out of a clock, to >12 ns out of the
box) and increased jitter (from below TIC-resolution of 20ps out of the
clock to 700ps std.dev at 100s out of the box) are now limiting our
measurements.
Does anyone have experience with a circuit with good rise-time and low
jitter?
Should I look for better optoisolators, or pulse-transformers, or something
else?
thanks for your input!
Anders
PS. I started on publishing my distribution-amplifier (non isolated) on the
ohwr.org site, see https://www.ohwr.org/projects/pda-8ch-fda-8ch/wiki/wiki
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Hoi Anders,
On Thu, 31 Aug 2017 15:12:00 +0300
Anders Wallin anders.e.e.wallin@gmail.com wrote:
I'm looking for a solution for galvanic isolation of a 1PPS signal-input to
a distribution amplifier.
What is the goal of the isolation? Breaking ground loops? Or safety?
How much isolation voltage do you need?
We have an old box using HCPL-2411 at the input followed by 74LS04, but the
degraded rise-time (from below 3ns out of a clock, to >12 ns out of the
box) and increased jitter (from below TIC-resolution of 20ps out of the
clock to 700ps std.dev at 100s out of the box) are now limiting our
measurements.
Yeah.. These optocouplers are not ment for stuff like this.
Does anyone have experience with a circuit with good rise-time and low
jitter?
Should I look for better optoisolators, or pulse-transformers, or something
else?
My first pick would have been an ADuM, like the ADuM1280 or so.
They offer decent rise/fall times and I guess the delay variations
should not be too much. But they have a temperature coefficient for
the delay, so beware of that!
Another idea would be to use one of the LVDS isolators like
the ADN4650, which has a jitter spec of 4.8ps RMS max (random).
You will need a TTL->LVDS and LVDS->TTL conversion, of course.
But the jitter added there should be small compared to the one
added by the isolator.
PS. I started on publishing my distribution-amplifier (non isolated) on the
ohwr.org site, see https://www.ohwr.org/projects/pda-8ch-fda-8ch/wiki/wiki
Cool! Thanks a lot!
Attila Kinali
--
You know, the very powerful and the very stupid have one thing in common.
They don't alters their views to fit the facts, they alter the facts to
fit the views, which can be uncomfortable if you happen to be one of the
facts that needs altering. -- The Doctor
Anders wrote:
I'm looking for a solution for galvanic isolation of a 1PPS signal-input to
a distribution amplifier.
* * *
Does anyone have experience with a circuit with good rise-time and low
jitter?
Sometimes the simplest solutions can be best. In this case, capacitive
coupling of the source into the load may be appropriate (see attached
diagram).
If the two chassis can be connected safely, all you need is to
cap-couple the signal line (upper diagram). While there may still be a
ground loop between the two chassis, it will not affect the PPS signal
because the small capacitor used to couple the signal line (probably
around 100pF, depending on the load impedance and the PPS pulse width)
will not carry any significant current at line and line harmonic
frequencies.
If the two chassis cannot be connected safely, then cap-couple the
common line as well (lower diagram). The common cap must be rated for
the maximum possible voltage between the two chassis. The two caps
should have approximately the same value.
The capacitive isolation can be at either end (source or load). I
prefer putting the AC coupling at the source end, so the interconnect
cable is shielded at all frequencies to the load.
This scheme will only work if the PPS output is robust enough to drive
the load impedance without further buffering. Also, there is no DC
reference at the load end. This may not be a problem if the PPS pulse
is short (tens of uS). Just make sure there is a DC path to ground on
the signal line (input termination resistor). Otherwise, you would need
to use a clamp to DC-restore the PPS signal.
Best regards,
Charles
