lajeunesse@mail.com said:
I'm sure you know the 1.8V supply regulators should not be fed from VDDA
(3.3V), but I'll mention it anyway.
Why not?
That sounds like the sort of issue I should understand but I'm coming up
blank.
--
These are my opinions. I hate spam.
The problem comes if the load current on the 1.8V regulator sees significant ups and downs. Think output regulator in particular. Might also happen with the digital core if major rollovers align and the core spikes. Those current changes get spread (admittedly reduced, too) by the bypass caps, resulting in noticeable load changes on the VDDA regulator. Any non-zero output impedance and the digital load changes enter back in as noise on what should be the quiet VDDA.
Sent: Thursday, January 25, 2018 at 4:18 PM
From: "Hal Murray" hmurray@megapathdsl.net
To: "Discussion of precise time and frequency measurement" time-nuts@febo.com
Cc: hmurray@megapathdsl.net
Subject: Re: [time-nuts] Slightly OT: interest in a four-output, ultra-low jitter, synthesizer block?
lajeunesse@mail.com said:
I'm sure you know the 1.8V supply regulators should not be fed from VDDA
(3.3V), but I'll mention it anyway.
Why not?
That sounds like the sort of issue I should understand but I'm coming up
blank.
--
These are my opinions. I hate spam.
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On 1/25/18 1:18 PM, Hal Murray wrote:
lajeunesse@mail.com said:
I'm sure you know the 1.8V supply regulators should not be fed from VDDA
(3.3V), but I'll mention it anyway.
usually, it's so that noise coupled back from the part doesn't back in
through the 1.8V.
If you have a (say) 5V supply and you generate 3.3Vdd with one regulator
and 1.8V with another regulator, you (should) have better isolation.
Trees rather than cascades.
Why not?
That sounds like the sort of issue I should understand but I'm coming up
blank.