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Re: [time-nuts] One sure way to kill your FE-5680A or FE-5650A

HM
Hal Murray
Thu, Jun 9, 2016 8:31 AM

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to a
CPU.  That screwed up when the power supply ramped up slowly enough.  Most
old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The tolerance
on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your oscillator
to get going?

--
These are my opinions.  I hate spam.

> The ATTinys have brownout detectors in them that’s supposed to keep them > from going bonkers during undervolt periods. Startup and/or brownout has long been a nasty problem area for digital designers. In the old old days, there was typically a R/C delay on the reset pin to a CPU. That screwed up when the power supply ramped up slowly enough. Most old timers have that merit badge. Modern CPU chips often have specs like power must be OK for 200 ms before releasing Reset. Anything like that will have at least one corresponding power monitor chip with several supply voltage inputs and the appropriate delay. The brownout side gets ugly when you look at the tolerances. The tolerance on the power monitor subtracts from the power supply tolerances. There is another worm in the can. How long does it take for your oscillator to get going? -- These are my opinions. I hate spam.
BC
Bob Camp
Thu, Jun 9, 2016 11:42 AM

Hi

Based on the number of different ways there seem to be to corrupt the operating software
in the FE Rb’s …. they seem to have a unique problem. There are a lot of devices
using the same basic parts that don’t turn into a brick when this or that happens.

Bob

On Jun 9, 2016, at 4:31 AM, Hal Murray hmurray@megapathdsl.net wrote:

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to a
CPU.  That screwed up when the power supply ramped up slowly enough.  Most
old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The tolerance
on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your oscillator
to get going?

--
These are my opinions.  I hate spam.


time-nuts mailing list -- time-nuts@febo.com
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and follow the instructions there.

Hi Based on the number of different ways there seem to be to corrupt the operating software in the FE Rb’s …. they seem to have a unique problem. There are a *lot* of devices using the same basic parts that don’t turn into a brick when this or that happens. Bob > On Jun 9, 2016, at 4:31 AM, Hal Murray <hmurray@megapathdsl.net> wrote: > > >> The ATTinys have brownout detectors in them that’s supposed to keep them >> from going bonkers during undervolt periods. > > Startup and/or brownout has long been a nasty problem area for digital > designers. > > In the old old days, there was typically a R/C delay on the reset pin to a > CPU. That screwed up when the power supply ramped up slowly enough. Most > old timers have that merit badge. > > Modern CPU chips often have specs like power must be OK for 200 ms before > releasing Reset. Anything like that will have at least one corresponding > power monitor chip with several supply voltage inputs and the appropriate > delay. > > The brownout side gets ugly when you look at the tolerances. The tolerance > on the power monitor subtracts from the power supply tolerances. > > There is another worm in the can. How long does it take for your oscillator > to get going? > > > > -- > These are my opinions. I hate spam. > > > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
CJ
Clint Jay
Thu, Jun 9, 2016 12:03 PM

It would seem so bit I don't remember seeing a 'reset'  chip in the 5680.
I'm wondering if there's scope to add one onto the rail that runs the PSD
and 80C320 to keep it in reset.
On 9 Jun 2016 13:00, "Bob Camp" kb8tq@n1k.org wrote:

Hi

Based on the number of different ways there seem to be to corrupt the
operating software
in the FE Rb’s …. they seem to have a unique problem. There are a lot of
devices
using the same basic parts that don’t turn into a brick when this or that
happens.

Bob

On Jun 9, 2016, at 4:31 AM, Hal Murray hmurray@megapathdsl.net wrote:

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to

a

CPU.  That screwed up when the power supply ramped up slowly enough.

Most

old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The

tolerance

on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your

oscillator

to get going?

--
These are my opinions.  I hate spam.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to

and follow the instructions there.


time-nuts mailing list -- time-nuts@febo.com
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and follow the instructions there.

It would seem so bit I don't remember seeing a 'reset' chip in the 5680. I'm wondering if there's scope to add one onto the rail that runs the PSD and 80C320 to keep it in reset. On 9 Jun 2016 13:00, "Bob Camp" <kb8tq@n1k.org> wrote: > Hi > > Based on the number of different ways there seem to be to corrupt the > operating software > in the FE Rb’s …. they seem to have a unique problem. There are a *lot* of > devices > using the same basic parts that don’t turn into a brick when this or that > happens. > > Bob > > > On Jun 9, 2016, at 4:31 AM, Hal Murray <hmurray@megapathdsl.net> wrote: > > > > > >> The ATTinys have brownout detectors in them that’s supposed to keep them > >> from going bonkers during undervolt periods. > > > > Startup and/or brownout has long been a nasty problem area for digital > > designers. > > > > In the old old days, there was typically a R/C delay on the reset pin to > a > > CPU. That screwed up when the power supply ramped up slowly enough. > Most > > old timers have that merit badge. > > > > Modern CPU chips often have specs like power must be OK for 200 ms before > > releasing Reset. Anything like that will have at least one corresponding > > power monitor chip with several supply voltage inputs and the appropriate > > delay. > > > > The brownout side gets ugly when you look at the tolerances. The > tolerance > > on the power monitor subtracts from the power supply tolerances. > > > > There is another worm in the can. How long does it take for your > oscillator > > to get going? > > > > > > > > -- > > These are my opinions. I hate spam. > > > > > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts@febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. >
BC
Bob Camp
Thu, Jun 9, 2016 5:11 PM

Hi

Their design is hardly unique in not having a dedicated supervisory part in it.
There are a lot of designs that work very well using basically the same
parts they use, without using a reset chip.

Without a lot of digging into exactly what is going on, there isn’t much of a
way to be sure of a fix.

One very real possibility is: The reason we have all these parts is that they
have a bug in them, and were scrapped out  because of it.

Bob

On Jun 9, 2016, at 8:03 AM, Clint Jay cjaysharp@gmail.com wrote:

It would seem so bit I don't remember seeing a 'reset'  chip in the 5680.
I'm wondering if there's scope to add one onto the rail that runs the PSD
and 80C320 to keep it in reset.
On 9 Jun 2016 13:00, "Bob Camp" kb8tq@n1k.org wrote:

Hi

Based on the number of different ways there seem to be to corrupt the
operating software
in the FE Rb’s …. they seem to have a unique problem. There are a lot of
devices
using the same basic parts that don’t turn into a brick when this or that
happens.

Bob

On Jun 9, 2016, at 4:31 AM, Hal Murray hmurray@megapathdsl.net wrote:

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to

a

CPU.  That screwed up when the power supply ramped up slowly enough.

Most

old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The

tolerance

on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your

oscillator

to get going?

--
These are my opinions.  I hate spam.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to

and follow the instructions there.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
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and follow the instructions there.

Hi Their design is hardly unique in not having a dedicated supervisory part in it. There are a *lot* of designs that work very well using basically the same parts they use, without using a reset chip. Without a lot of digging into exactly what is going on, there isn’t much of a way to be sure of a fix. One very real possibility is: The reason we *have* all these parts is that they have a bug in them, and were scrapped out because of it. Bob > On Jun 9, 2016, at 8:03 AM, Clint Jay <cjaysharp@gmail.com> wrote: > > It would seem so bit I don't remember seeing a 'reset' chip in the 5680. > I'm wondering if there's scope to add one onto the rail that runs the PSD > and 80C320 to keep it in reset. > On 9 Jun 2016 13:00, "Bob Camp" <kb8tq@n1k.org> wrote: > >> Hi >> >> Based on the number of different ways there seem to be to corrupt the >> operating software >> in the FE Rb’s …. they seem to have a unique problem. There are a *lot* of >> devices >> using the same basic parts that don’t turn into a brick when this or that >> happens. >> >> Bob >> >>> On Jun 9, 2016, at 4:31 AM, Hal Murray <hmurray@megapathdsl.net> wrote: >>> >>> >>>> The ATTinys have brownout detectors in them that’s supposed to keep them >>>> from going bonkers during undervolt periods. >>> >>> Startup and/or brownout has long been a nasty problem area for digital >>> designers. >>> >>> In the old old days, there was typically a R/C delay on the reset pin to >> a >>> CPU. That screwed up when the power supply ramped up slowly enough. >> Most >>> old timers have that merit badge. >>> >>> Modern CPU chips often have specs like power must be OK for 200 ms before >>> releasing Reset. Anything like that will have at least one corresponding >>> power monitor chip with several supply voltage inputs and the appropriate >>> delay. >>> >>> The brownout side gets ugly when you look at the tolerances. The >> tolerance >>> on the power monitor subtracts from the power supply tolerances. >>> >>> There is another worm in the can. How long does it take for your >> oscillator >>> to get going? >>> >>> >>> >>> -- >>> These are my opinions. I hate spam. >>> >>> >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
NS
Nick Sayer
Thu, Jun 9, 2016 7:31 PM

On Jun 9, 2016, at 10:11 AM, Bob Camp kb8tq@n1k.org wrote:

One very real possibility is: The reason we have all these parts is that they
have a bug in them, and were scrapped out  because of it.

From what I’ve read elsewhere (and I can’t find a citation right now), they (at least the FE-5680As) were used in cell phone bases that were decommissioned after network upgrades.

Bob

On Jun 9, 2016, at 8:03 AM, Clint Jay cjaysharp@gmail.com wrote:

It would seem so bit I don't remember seeing a 'reset'  chip in the 5680.
I'm wondering if there's scope to add one onto the rail that runs the PSD
and 80C320 to keep it in reset.
On 9 Jun 2016 13:00, "Bob Camp" kb8tq@n1k.org wrote:

Hi

Based on the number of different ways there seem to be to corrupt the
operating software
in the FE Rb’s …. they seem to have a unique problem. There are a lot of
devices
using the same basic parts that don’t turn into a brick when this or that
happens.

Bob

On Jun 9, 2016, at 4:31 AM, Hal Murray hmurray@megapathdsl.net wrote:

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to

a

CPU.  That screwed up when the power supply ramped up slowly enough.

Most

old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The

tolerance

on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your

oscillator

to get going?

--
These are my opinions.  I hate spam.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to

and follow the instructions there.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
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> On Jun 9, 2016, at 10:11 AM, Bob Camp <kb8tq@n1k.org> wrote: > > > One very real possibility is: The reason we *have* all these parts is that they > have a bug in them, and were scrapped out because of it. > From what I’ve read elsewhere (and I can’t find a citation right now), they (at least the FE-5680As) were used in cell phone bases that were decommissioned after network upgrades. > Bob > > >> On Jun 9, 2016, at 8:03 AM, Clint Jay <cjaysharp@gmail.com> wrote: >> >> It would seem so bit I don't remember seeing a 'reset' chip in the 5680. >> I'm wondering if there's scope to add one onto the rail that runs the PSD >> and 80C320 to keep it in reset. >> On 9 Jun 2016 13:00, "Bob Camp" <kb8tq@n1k.org> wrote: >> >>> Hi >>> >>> Based on the number of different ways there seem to be to corrupt the >>> operating software >>> in the FE Rb’s …. they seem to have a unique problem. There are a *lot* of >>> devices >>> using the same basic parts that don’t turn into a brick when this or that >>> happens. >>> >>> Bob >>> >>>> On Jun 9, 2016, at 4:31 AM, Hal Murray <hmurray@megapathdsl.net> wrote: >>>> >>>> >>>>> The ATTinys have brownout detectors in them that’s supposed to keep them >>>>> from going bonkers during undervolt periods. >>>> >>>> Startup and/or brownout has long been a nasty problem area for digital >>>> designers. >>>> >>>> In the old old days, there was typically a R/C delay on the reset pin to >>> a >>>> CPU. That screwed up when the power supply ramped up slowly enough. >>> Most >>>> old timers have that merit badge. >>>> >>>> Modern CPU chips often have specs like power must be OK for 200 ms before >>>> releasing Reset. Anything like that will have at least one corresponding >>>> power monitor chip with several supply voltage inputs and the appropriate >>>> delay. >>>> >>>> The brownout side gets ugly when you look at the tolerances. The >>> tolerance >>>> on the power monitor subtracts from the power supply tolerances. >>>> >>>> There is another worm in the can. How long does it take for your >>> oscillator >>>> to get going? >>>> >>>> >>>> >>>> -- >>>> These are my opinions. I hate spam. >>>> >>>> >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts@febo.com >>>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.
BC
Bob Camp
Thu, Jun 9, 2016 8:26 PM

Hi

On Jun 9, 2016, at 3:31 PM, Nick Sayer via time-nuts time-nuts@febo.com wrote:

On Jun 9, 2016, at 10:11 AM, Bob Camp kb8tq@n1k.org wrote:

One very real possibility is: The reason we have all these parts is that they
have a bug in them, and were scrapped out  because of it.

From what I’ve read elsewhere (and I can’t find a citation right now), they (at least the FE-5680As) were used in cell phone bases that were decommissioned after network upgrades.

That’s always been the leading theory. It matches up with the reason you
see a lot of other ex-cell gear out of China. It may or may not be correct
in this case. We never ever seem to get a fully authoritative answer to those
sort of questions.

Bob

Bob

On Jun 9, 2016, at 8:03 AM, Clint Jay cjaysharp@gmail.com wrote:

It would seem so bit I don't remember seeing a 'reset'  chip in the 5680.
I'm wondering if there's scope to add one onto the rail that runs the PSD
and 80C320 to keep it in reset.
On 9 Jun 2016 13:00, "Bob Camp" kb8tq@n1k.org wrote:

Hi

Based on the number of different ways there seem to be to corrupt the
operating software
in the FE Rb’s …. they seem to have a unique problem. There are a lot of
devices
using the same basic parts that don’t turn into a brick when this or that
happens.

Bob

On Jun 9, 2016, at 4:31 AM, Hal Murray hmurray@megapathdsl.net wrote:

The ATTinys have brownout detectors in them that’s supposed to keep them
from going bonkers during undervolt periods.

Startup and/or brownout has long been a nasty problem area for digital
designers.

In the old old days, there was typically a R/C delay on the reset pin to

a

CPU.  That screwed up when the power supply ramped up slowly enough.

Most

old timers have that merit badge.

Modern CPU chips often have specs like power must be OK for 200 ms before
releasing Reset.  Anything like that will have at least one corresponding
power monitor chip with several supply voltage inputs and the appropriate
delay.

The brownout side gets ugly when you look at the tolerances.  The

tolerance

on the power monitor subtracts from the power supply tolerances.

There is another worm in the can.  How long does it take for your

oscillator

to get going?

--
These are my opinions.  I hate spam.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to

and follow the instructions there.


time-nuts mailing list -- time-nuts@febo.com
To unsubscribe, go to
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and follow the instructions there.


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Hi > On Jun 9, 2016, at 3:31 PM, Nick Sayer via time-nuts <time-nuts@febo.com> wrote: > > >> On Jun 9, 2016, at 10:11 AM, Bob Camp <kb8tq@n1k.org> wrote: >> >> >> One very real possibility is: The reason we *have* all these parts is that they >> have a bug in them, and were scrapped out because of it. >> > > From what I’ve read elsewhere (and I can’t find a citation right now), they (at least the FE-5680As) were used in cell phone bases that were decommissioned after network upgrades. That’s always been the leading theory. It matches up with the reason you see a lot of other ex-cell gear out of China. It may or may not be correct in this case. We never ever seem to get a fully authoritative answer to those sort of questions. Bob > >> Bob >> >> >>> On Jun 9, 2016, at 8:03 AM, Clint Jay <cjaysharp@gmail.com> wrote: >>> >>> It would seem so bit I don't remember seeing a 'reset' chip in the 5680. >>> I'm wondering if there's scope to add one onto the rail that runs the PSD >>> and 80C320 to keep it in reset. >>> On 9 Jun 2016 13:00, "Bob Camp" <kb8tq@n1k.org> wrote: >>> >>>> Hi >>>> >>>> Based on the number of different ways there seem to be to corrupt the >>>> operating software >>>> in the FE Rb’s …. they seem to have a unique problem. There are a *lot* of >>>> devices >>>> using the same basic parts that don’t turn into a brick when this or that >>>> happens. >>>> >>>> Bob >>>> >>>>> On Jun 9, 2016, at 4:31 AM, Hal Murray <hmurray@megapathdsl.net> wrote: >>>>> >>>>> >>>>>> The ATTinys have brownout detectors in them that’s supposed to keep them >>>>>> from going bonkers during undervolt periods. >>>>> >>>>> Startup and/or brownout has long been a nasty problem area for digital >>>>> designers. >>>>> >>>>> In the old old days, there was typically a R/C delay on the reset pin to >>>> a >>>>> CPU. That screwed up when the power supply ramped up slowly enough. >>>> Most >>>>> old timers have that merit badge. >>>>> >>>>> Modern CPU chips often have specs like power must be OK for 200 ms before >>>>> releasing Reset. Anything like that will have at least one corresponding >>>>> power monitor chip with several supply voltage inputs and the appropriate >>>>> delay. >>>>> >>>>> The brownout side gets ugly when you look at the tolerances. The >>>> tolerance >>>>> on the power monitor subtracts from the power supply tolerances. >>>>> >>>>> There is another worm in the can. How long does it take for your >>>> oscillator >>>>> to get going? >>>>> >>>>> >>>>> >>>>> -- >>>>> These are my opinions. I hate spam. >>>>> >>>>> >>>>> >>>>> _______________________________________________ >>>>> time-nuts mailing list -- time-nuts@febo.com >>>>> To unsubscribe, go to >>>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>> and follow the instructions there. >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts@febo.com >>>> To unsubscribe, go to >>>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts@febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts@febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there.