A friend of mine is an engineer for one of the biggest manufacturers of clock chips and has worked quite a bit on their clock chips and is quite familiar with the issues of building consistent ultra low power oscillators in a production product. Getting nanowatt (and now sub-nanowatt) level oscillators to do their thing consistently is not easy. Getting them to do it with customer supplied crystals is a big thing. Variations by the crystal maker regularly cause previously working products to stop working. Also they are notoriously sensitive to PCB layout issues. Older, higher power clock chips don't have nearly as many problems as the newer ultra low power designs. Competition to see who can make the lowest power clock chips seems to be one of the biggest drivers for new clock chip designs. Oh, and although the clock chip oscillators have good long term accuracy they tend to have lots of jitter and poor ADEVs.

On Sun, Jul 30, 2017, at 03:37 PM, Mark Sims wrote: > A friend of mine is an engineer for one of the biggest manufacturers of > clock chips and has worked quite a bit on their clock chips and is quite > familiar with the issues of building consistent ultra low power > oscillators in a production product. Getting nanowatt (and now > sub-nanowatt) level oscillators to do their thing consistently is not > easy. Getting them to do it with customer supplied crystals is a big > thing. Variations by the crystal maker regularly cause previously > working products to stop working. Also they are notoriously sensitive to > PCB layout issues. Older, higher power clock chips don't have nearly as > many problems as the newer ultra low power designs. Competition to see > who can make the lowest power clock chips seems to be one of the biggest > drivers for new clock chip designs. What's the motivation for this, other than "because we can"? Aren't existing RTC chips capable of running 10+ years from a lithium coin cell already, to the point where the cell's self-discharge is the limiting factor? Is there some application where exceptionally low power use for a clock chip would be of interest? I ask as an interested amateur not familiar with the subtleties of such designs. Cheers! -Pete

The typical method of frequency correction is not to add or subtract capacitance across the crystal, (like an old analog engineer would do) but rather to add or subtract pulses to the stream of cycles/pulses coming out of the crystal oscillator. More the kind of correction a digital engineer would do. The long term end result is correct, but the addition and subtraction of correction pulses shows up as jitter and short term errors. As far as the need for low battery drain, everything is going for smaller, lighter, cheaper, portable, and runs off a battery. You would probably turn your nose up at a watch, whose battery did not last at least a year. Most simple watches go several years. Now put an electronic display on it, and a GPS in it and BlueTooth LE. Everything inside is under pressure to make sure the battery lasts as long as possible. I personally don't wear a watch any more. Get GPS time from my cellphone, that fits in my watch pocket of my jeans. (I finally found a use for that pocket, after wearing pants with them for 50+ years.) But, I have to charge the thing every day, every other day, at the most. What I want, is a cellphone that I only have to charge once a week, or once a month. I don't want to have to be in the battery management business. Before we exited from the pager business, we had a customer that had a published goal of a pager that would run an entire year on one "AA" primary (alkaline throw-away) battery. Imagine changing the battery once per year, on New Years day. We were up to running for nine months from a single AA battery. Now, that was a radio receiver and a 'beeper' (and an internal clock for management purposes.). And we had a road map to get to the full year, but the cellphone systems killed the pager business first. It was all about timing, and putting as much of the IC to sleep at any given time, as you could. On Sun, Jul 30, 2017 at 8:37 AM, Mark Sims <holrum@hotmail.com> wrote: > A friend of mine is an engineer for one of the biggest manufacturers of > clock chips and has worked quite a bit on their clock chips and is quite > familiar with the issues of building consistent ultra low power oscillators > in a production product. Getting nanowatt (and now sub-nanowatt) level > oscillators to do their thing consistently is not easy. Getting them to > do it with customer supplied crystals is a big thing. Variations by the > crystal maker regularly cause previously working products to stop working. > Also they are notoriously sensitive to PCB layout issues. Older, higher > power clock chips don't have nearly as many problems as the newer ultra low > power designs. Competition to see who can make the lowest power clock > chips seems to be one of the biggest drivers for new clock chip designs. > > Oh, and although the clock chip oscillators have good long term accuracy > they tend to have lots of jitter and poor ADEVs. > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/ > mailman/listinfo/time-nuts > and follow the instructions there. >