I've done some tests with TDC7200 and TDC_GP22 few months ago.(https://www.febo.com/pipermail/time-nuts/2016-May/098170.html)
Here is the performance test of my recent board.
http://www.qsl.net/b/bi7lnq/Projects/freqcnt6.0/schematic.pdf
http://www.qsl.net/b/bi7lnq/Projects/freqcnt6.0/freqcntv6.0.jpg
The "analog front end" is 74lvc1g04/nc7sz125. 3 TDC7200s are on the board. Only TI mode is tested at the moment.(the truth is I forgot to connect the SPI port to FPGA ......, I need to reuse the config ports to implement a bidirectional SPI to read the counters in FPGA)
DUT and REF are from a homebrew distribution amp( http://www.qsl.net/b/bi7lnq/distribution_amp/v1.5/10M_distributor.pdf), the source is a FE180 OCXO.
I also tried to measure 3 OCXOs at the same time. FE180, OCXO8663, free running TBOLT
http://www.qsl.net/b/bi7lnq/Projects/freqcnt6.0/data/20161209/freqcnt_v6_20161209.png
http://www.qsl.net/b/bi7lnq/Projects/freqcnt6.0/data/20161209/freqcnt_v6_20161209_3corneredhat.png
TODO list:
Regards
Li Ang / BI7LNQ
On Fri, 9 Dec 2016 21:29:34 +0800
"Li Ang" 379998@qq.com wrote:
I've done some tests with TDC7200 and TDC_GP22 few months ago.(https://www.febo.com/pipermail/time-nuts/2016-May/098170.html)
Thanks for the report. It's interesting to see that the TDC7200 performs
slightly better than the GP22.
BTW: If you are using a large FPGA like the EP4CE22, then you might
want to consider using it directly as a TDC. You can fit four ring oscillator
based TDC easily and have more than enough space for your control logic
(we did a 4 TDC system with an NIOS2 core and some glue and still had
space spare).
The bin with is in the order of 22ps, with excursions up to 100ps.
The code we used was based on the tdc-core by CERN[1] and can be found
on my git server [2]. Special thanks to Florian Huemer who got it
working properly.
Attila Kinali
[1] http://www.ohwr.org/projects/tdc-core/wiki
[2] http://git.kinali.ch/attila/nios2_clocksync/tree/master/fpga/cores/tdc
--
It is upon moral qualities that a society is ultimately founded. All
the prosperity and technological sophistication in the world is of no
use without that foundation.
-- Miss Matheson, The Diamond Age, Neil Stephenson
Hi
Thanks for the info. The fpga baesed TDC is something I am interested in. However, I am a beginner of fpga programming. Maybe next year I will spend sometime study this project. VHDL is quite difficult for a C programmer :(.
Regards
Li Ang
BI7LNQ
---Original---
From: "Attila Kinali"attila@kinali.ch
Date: 2016/12/16 02:00:32
To: "Discussion of precise time and frequency measurement"time-nuts@febo.com;
Subject: Re: [time-nuts] Performance of TDC7200
On Fri, 9 Dec 2016 21:29:34 +0800
"Li Ang" 379998@qq.com wrote:
I've done some tests with TDC7200 and TDC_GP22 few months ago.(https://www.febo.com/pipermail/time-nuts/2016-May/098170.html)
Thanks for the report. It's interesting to see that the TDC7200 performs
slightly better than the GP22.
BTW: If you are using a large FPGA like the EP4CE22, then you might
want to consider using it directly as a TDC. You can fit four ring oscillator
based TDC easily and have more than enough space for your control logic
(we did a 4 TDC system with an NIOS2 core and some glue and still had
space spare).
The bin with is in the order of 22ps, with excursions up to 100ps.
The code we used was based on the tdc-core by CERN[1] and can be found
on my git server [2]. Special thanks to Florian Huemer who got it
working properly.
Attila Kinali
[1] http://www.ohwr.org/projects/tdc-core/wiki
[2] http://git.kinali.ch/attila/nios2_clocksync/tree/master/fpga/cores/tdc
--
It is upon moral qualities that a society is ultimately founded. All
the prosperity and technological sophistication in the world is of no
use without that foundation.
-- Miss Matheson, The Diamond Age, Neil Stephenson
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